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On-demand reconfiguration for coprocessors in mixed criticality multicore systems

机译:混合临界多核系统中协处理器的按需重新配置

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Especially in complex system-of-systems scenarios, where multiple high-performance or real-time processing functions need to co-exist and interact, reconfigurable devices together with virtualization techniques show considerable promise to increase efficiency, ease integration and maintain functional and non-functional properties of the individual functions. In a previous work, we proposed a concept that leverages the advantages of FPGA's partial reconfiguration in heterogeneous mixed criticality multicore systems. The basic idea how to handle the partial reconfiguration transparently for noncritical tasks, while providing full control and a predictable behavior for safety relevant tasks was described. In this paper, we focus on the on-demand partial reconfiguration of coprocessors and its implementation details. Our prototype is implemented on an Intel multicore system and a Xilinx Virtex-7 FPGA connected via PCI Express, taking advantage of the Single-Root I/O Virtualization capabilities in modern PCI Express implementations. Experimental results show that compared to the reference software implementation, our concept achieves significantly shorter reconfiguration time with lower variance under various system load situations.
机译:特别是在复杂的系统系统方案中,其中多种高性能或实时处理功能需要共存和交互,可重新配置的设备与虚拟化技术一起显示出增加效率,轻松集成和维护功能和非功能和非各个功能的功能属性。在以前的工作中,我们提出了一种利用FPGA在异构混合临界多核系统中的部分重新配置的优势的概念。描述如何透明地处理非临界任务的基本理念,同时提供完全控制和用于安全相关任务的可预测行为。在本文中,我们专注于协处理器的按需部分重新配置及其实施细节。我们的原型在英特尔多核系统和通过PCI Express连接的Xilinx Virtex-7 FPGA上实现,利用现代PCI Express实现中的单根I / O虚拟化功能。实验结果表明,与参考软件实现相比,我们的概念在各种系统负载情况下实现了明显较短的重新配置时间,具有较低的差异。

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