Functional Coverage is a mechanism used in digital integrated circuits functional verification to measure whether the executed test set covered the declared functionality. It helps to examine test scenarios, by providing metrics that give information about the testcase or design-under-test (DUT) reached states (coverage points). SystemVerilog language provides dedicated syntax to make it possible, such as covergroup and coverpoint objects. However, these features have very limited functionality. It is difficult to manipulate functional coverage data on the testbench level, e.g. to make the test scenario dependent on the real-time coverage metrics. It is also not clear how to define coverage objects for complex design features. The architecture of a new, object-oriented functional coverage mechanism for digital verification, implemented in Python, is proposed in this paper. The testbench is based on the Cocotb open verification framework. The implemented solution gives more flexibility than standard System Verilog syntax and enables more agile creation of verification environments.
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