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A DVS-Based Burst Mode with Automatic Entrance Point Control Technique in DC-DC Boost Converter for Wearable Devices and IoT Applications

机译:一种基于DCS的突发模式,具有DC-DC升压转换器中的自动入口点控制技术,可穿戴设备和IOT应用

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The proposed dynamic voltage scaling (DVS) based burst mode links the DVS technique in a system on a chip (SoC) and the burst mode operation of the DC-DC converter for further efficiency improving. Conventional burst mode has only one entrance transition point (ETP) between the pulse width modulation (PWM) and the burst mode, so the voltage ripple is high at low DVS voltage while the efficiency is low at high DVS voltage. The proposed DVS-based burst mode uses the automatic entrance point control (AEPC) technique to decide multiple ETP values corresponding to the voltage identification (VID) code from the SoC. The quality enhancement technique deliberately adjusts the burst reference voltage to further reduce the output ripple with acceptable loss of efficiency. The tested DC-DC boost converter with the DVS-based burst mode technique is fabricated in 0.18μm CMOS process. Measurement results show that the efficiency is higher than 85% when the output voltage varies from 1.8V to 3.2V (controlled by the DVS) and load current ranges from 0.1mA to 140mA, with peak efficiency 94%.
机译:所提出的动态电压缩放(DVS)的突发模式将DVS技术链接在芯片(SOC)上的系统中和DC-DC转换器的突发模式操作中,以进一步提高效率。传统的突发模式在脉冲宽度调制(PWM)和突发模式之间仅具有一个入口转换点(ETP),因此电压纹波在低DVS电压下高,而在高DVS电压下效率低。所提出的基于DVS的突发模式使用自动入口控制(AEPC)技术来确定与来自SOC的电压识别(VID)代码对应的多个ETP值。质量增强技术故意调整突发参考电压,以进一步降低输出纹波,效率可接受。具有基于DVS的突发模式技术的测试的DC-DC升压转换器在0.18μmCMOS工艺中制造。测量结果表明,当输出电压从1.8V至3.2V(由DVS控制)变化时,效率高于85%,负载电流为0.1mA至140mA,峰值效率为94%。

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