An approach to modeling labor and machine down time in semiconductor fabrication

摘要

The authors present an approach to modeling labor resources, random equipment failures, and preventative maintenance in a wafer fabrication facility, and address their inherent complexities. This approach was implemented in a simulation model of an ASIC (application-specific integrated circuit) wafer fabrication facility, developed using the SIMAN simulation language. The important features of the model are its ability to accurately model labor separately from pure equipment processing time, and to model both scheduled and unscheduled maintenance activities. The labor model considers operator skills, man-machine ratios, and proximity of resources being monitored. This allows the simulation analyst to consider the effects of changes in production starts on labor requirements. The equipment downtime model accurately reflects the impact of random machine failures, when the data are available. This allows the analyst to evaluate the impact on cycle times and throughput of improving the uptime performance of a machine.