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Optimal design of a modular 11kW serial parallel resonant converter for a solid state 115-kV long pulse modulator

机译:用于固态115-kV长脉冲调制器的模块化11kW串行谐振转换器的最优设计

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Modern accelerator driven experiments like linear colliders or spallation sources are supplied by RF amplifiers using klystrons. The cathode voltage for these klystrons can be generated by long pulse modulators generating highly accurate voltage pulses in the length of milliseconds. Common designs like Bouncer Modulator topologies using pulse transformers become huge for long pulses. The series parallel resonant converter (SPRC) is a modular topology which avoids this drawback as the transformer is operated at high frequencies. In the considered application, the required nominal pulse voltage amplitude is 115kV with a pulse power of 2.88MW and a pulse length of 2.8ms. The pulse to pulse reproducibility of 0.02% and a voltage ripple at top of less than 0.05% are highly demanding. Additionally, the energy delivered to the load in case of an arcing klystron should not exceed 10J and the time of the converter should exceed 109 pulses. In order to meet these highly demanding specifications, the modulator is based on interleaved SPRC modules. Because of the high number of degrees of freedom as geometric parameters of the transformer, number of parallel semiconductors, design of the resonant tank the optimization procedure presented in [1] has been developed for designing the modulator. A SPRC module contains a full bridge connected to a series parallel circuit followed by a transformer a rectifier and a filter capacitor. In this paper, an optimal design of a single module according to the design considerations in [1] which are based on an electrical model of the inverter, a magnetic, a thermal and an isolation model of the transformer is presented and the design trade-offs/alternatives are discussed in detail. For validation of the models and the optimization procedure, a prototype of a single module has been built and is tested under full load conditions. There the focus is on evaluating the thermal behaviour of the transformer and the isolation of the transf- rmer, which is especially crucial for a series connection of the modules. In order to meet the highly demanding requirements on the ripple and the reproducibility, a comprehensive small signal model based on [2] and control strategy for optimal interleaving of the series connected modules is presented in the paper. This enables to minimize the output voltage ripple and reducing the filtering effort at the same time.
机译:现代加速器驱动实验,如线性侵占器或剥落源,由rf放大器使用klystrons提供。这些klystrons的阴极电压可以由长脉冲调制器产生的,在毫秒的长度中产生高精度的电压脉冲。使用脉冲变压器的保镖调节器拓扑等常见设计对长脉冲变得巨大。串联谐振转换器(SPRC)是模块化拓扑,其避免了该缺点,因为变压器在高频下操作。在考虑的应用中,所需的标称脉冲电压幅度为115kV,脉冲功率为2.88mW,脉冲长度为2.8ms。脉冲到脉冲再现性为0.02%,电压纹波在小于0.05%的顶部是非常苛刻的。另外,在电弧klystron的情况下输送到负载的能量不应超过10j,转换器的时间应超过10 9 脉冲。为了满足这些高苛刻的规格,调制器基于交错的SPRC模块。由于作为变压器的几何参数的自由度的多数自由度,并联半导体的数量,谐振箱的设计已经开发了用于设计调制器的[1]中呈现的优化过程。 SPRC模块包含一个连接到串联电路的全桥,然后是变压器为整流器和滤波电容。本文提出了根据[1]的设计考虑的单个模块的最佳设计,其基于变频器的电模型,磁,热量和变压器的隔离模型以及设计交易 - 详细讨论了OFFS /替代方案。为了验证模型和优化过程,已经构建了单个模块的原型,并在满载条件下进行测试。在那里,重点是评估变压器的热行为和晶体频率的隔离,这对模块的串联连接尤其如至关重要。为了满足对纹波的高苛刻要求和再现性,纸张中提出了一种基于[2]的全面的小信号模型和用于最佳交错的控制策略。这使得能够最小化输出电压纹波并同时降低过滤工作。

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