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A New Design of Embedded IPv4/IPv6 Dual-Stack Protocol

机译:嵌入式IPv4 / IPv6双堆栈协议的新设计

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Embedded devices with access to Internet have been widely used. Due to the large scale of deployment of IPv4 throughout Internet, the complete transition from IPv4 to IPv6 will take a long time. In order to make embedded devices work well during the transition period, we design an embedded IPv4/IPv6 dual stack. It integrates the open-source IPv4 stack LwIP with EIPv6, a single IPv6 stack we have developed for embedded systems. Considering the format difference between the IPv4 and IPv6 addresses, we propose a novel address format, called dual-stack address, to integrate the two address formats together. The dual stack has been implemented and tested on the evaluation board LM3s8962, in which the dual stack consumes about 33KB of ROM and 6KB of RAM. Meanwhile, the communication speed can reach 40 KB/s, which satisfies most embedded devices.
机译:已广泛使用具有访问互联网的嵌入式设备。 由于在整个互联网中部署IPv4的大规模,从IPv4到IPv6的完全过渡将需要很长时间。 为了使嵌入式设备在过渡期间工作良好,我们设计嵌入式IPv4 / IPv6双堆栈。 它集成了带有EIPv6的开源IPv4堆栈LWIP,我们为嵌入式系统开发了一个IPv6堆栈。 考虑到IPv4和IPv6地址之间的格式差异,我们提出了一种新颖的地址格式,称为双堆栈地址,将两个地址格式集成在一起。 在评估板LM3S8962上已经实现和测试了双堆栈,其中双堆消耗约33KB的ROM和6KB的RAM。 同时,通信速度可以达到40 kB / s,满足大多数嵌入式设备。

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