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A New Design of Embedded IPv4/IPv6 Dual-Stack Protocol

机译:嵌入式IPv4 / IPv6双协议栈的新设计

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Embedded devices with access to Internet have been widely used. Due to the large scale of deployment of IPv4 throughout Internet, the complete transition from IPv4 to IPv6 will take a long time. In order to make embedded devices work well during the transition period, we design an embedded IPv4/IPv6 dual stack. It integrates the open-source IPv4 stack LwIP with EIPv6, a single IPv6 stack we have developed for embedded systems. Considering the format difference between the IPv4 and IPv6 addresses, we propose a novel address format, called dual-stack address, to integrate the two address formats together. The dual stack has been implemented and tested on the evaluation board LM3s8962, in which the dual stack consumes about 33KB of ROM and 6KB of RAM. Meanwhile, the communication speed can reach 40 KB/s, which satisfies most embedded devices.
机译:可以访问Internet的嵌入式设备已被广泛使用。由于IPv4在整个Internet上的大规模部署,从IPv4到IPv6的完全过渡将需要很长时间。为了使嵌入式设备在过渡期间正常工作,我们设计了嵌入式IPv4 / IPv6双协议栈。它将开源IPv4堆栈LwIP与EIPv6集成在一起,EIPv6是我们为嵌入式系统开发的单个IPv6堆栈。考虑到IPv4和IPv6地址之间的格式差异,我们提出了一种新颖的地址格式,称为双栈地址,将两种地址格式集成在一起。双栈已在评估板LM3s8962上实现并测试,其中双栈消耗约33KB的ROM和6KB的RAM。同时,通信速度可以达到40 KB / s,可以满足大多数嵌入式设备的需求。

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