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Optimization of linked list prefix computations on multithreaded GPUs using CUDA

机译:使用CUDA的多线程GPU上的链接列表前缀计算的优化

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We present a number of optimization techniques to compute prefix sums on linked lists and implement them on multithreaded GPUs using CUDA. Prefix computations on linked structures involve in general highly irregular fine grain memory accesses that are typical of many computations on linked lists, trees, and graphs. While the current generation of GPUs provides substantial computational power and extremely high bandwidth memory accesses, they may appear at first to be primarily geared toward streamed, highly data parallel computations. In this paper, we introduce an optimized multithreaded GPU algorithm for prefix computations through a randomization process that reduces the problem to a large number of fine-grain computations. We map these fine-grain computations onto multithreaded GPUs in such a way that the processing cost per element is shown to be close to the best possible. Our experimental results show scalability for list sizes ranging from 1M nodes to 256M nodes, and significantly improve on the recently published parallel implementations of list ranking, including implementations on the Cell Processor, the MTA-8, and the NVIDIA GeForce 200 series. They also compare favorably to the performance of the best known CUDA algorithm for the scan operation on the Tesla C1060.
机译:我们提出了许多优化技术来计算链接列表上的前缀和,并使用CUDA在多线程GPU上实现它们。链路结构上的前缀计算涉及一般的高度不规则的细颗粒存储器访问,这些内存访问是链接列表,树木和图形的许多计算的典型。虽然目前GPU的产生提供了大量的计算能力和极高的带宽存储器访问,但它们可能首先出现主要朝向流式流,高度数据并行计算。在本文中,我们通过随机化过程介绍了前缀计算的优化多线程GPU算法,该过程将问题减少到大量的细粒度计算。我们将这些细粒度计算映射到多线程GPU上,以这样的方式,即每个元素的处理成本被显示为接近最佳。我们的实验结果表明,列表大小的可扩展性范围从1M节点到256M节点,并且在最近公布的列表排名的并行实现中显着改善,包括细胞处理器,MTA-8和NVIDIA GeForce 200系列的实现。它们还可以对TESLA C1060上的扫描操作的最佳已知的CUDA算法的性能进行比较。

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