VHDL-based modeling of a DC-DC boost converter

摘要

A VHDL-based description of a DC-DC boost converter is here presented. Starting from description of simple functional blocks such as voltage dividers, comparators and function??s generators, more complex DC-DC step-up voltage converter was modeled by adopting a structural description of previous blocks. The proposed VHDL modeling can be used to simulate complex digital circuits which includes a few of analog parts (e.g., memory banks or DSP core) by adopting an event-driven standard simulator and avoiding using common transistor-level simulators which dramatically increase the verification time.