A systolic trinomial GF(2k) multiplier based on the Montgomery Multiplication Algorithm

摘要

The use of irreducible trinomial for GF(2k) field multiplication is widely accepted in parallel designs as a solution to improve the multiplication process. However, the degree of optimization has not been tested for the Montgomery Multiplication Algorithm for GF(2k) fields, a sequential algorithm not yet designed and implemented in hardware using trinomials. In this paper, a semisystolic-pipelined Montgomery Multiplier architecture defined over irreducible trinomial is proposed. The proposed architecture and Hardware implementation is compared with other known designs, in terms of gate-flip flop number, Chip Covered Area, latency, critical path and clock Frequency, and the degree of optimization using trinomials is measured, giving very optimistic results.