A closed loop dynamic scheduling method based on load balancing for semiconductor wafer fabrication facility

摘要

Reentrant flows as the typical characteristic of semiconductor manufacturing, create complex competition for limited resource capacity, resulting in heavy workload of some machines. In this way, some machines known as bottlenecks are over-loading while others are under-loading, which may deteriorate the overall performance of production line. Therefore, load balancing, i.e., adjusting the distribution of workload, should be considered to deal with dispatching rules for semiconductor wafer fabrication facility. As a result, a novel approach, namely Dynamic Dispatching Rule considering Load Balancing (DDRLB) is proposed. First, a load balancing prediction model is constructed for the proposed DDRLB. Then, the details of the DDRLB are demonstrated. At last, empirical studies have shown the advantages of DDRLB over ordinary dynamic dispatching rule (DDR).