A 45nm FM0/Manchester code generator with PT logic running at 4GHz for DSRC applications

摘要

By and large used encodings for DSRC communication are FM0 and Manchester to reach dc-balance and enhancing the signal reliability. With ever reducing chip sizes but with increased number of transistors being used, need for high speed with low power rated devices bring the need for alternative design technologies other than static complementary metal-oxide-semiconductors. Among new design technologies that are being considered Pass Transistor Logic (PTL) is promising much. In this paper, Manchester and FM0 encoder that can operate at 4GHz clock frequency without a complicated circuit structure is discussed. When compared to CMOS architecture, technique of PTL reduces the number of transistors to 31%. The proposed design has been done using Symica DE tool with 45nm technology.