Simulation and Synthesis of Networks-on-Chip by Using NoCSimp HDL Library

摘要

This paper proposes an approach to the synthesis and modeling of networks-on-chip (NoCs) by using the NoCSimp library based on a simplified wormhole router with central buffer and without virtual channels. The analysis of the results of simulation and synthesis of NoCs with regular and quasi-optimal topologies with number of nodes 8 and 9 is given. It is shown that in the case where the number of NoC nodes is not a power of 2 the use of quasi-optimal topologies offers a significant advantage.