A Parallel JTAG-based Debugging and Selection Scheme for Multi-core Digital Signal Processors

摘要

With the rapid development of the SoC integration technology, multi-core digital signal processors (DSPs) are becoming increasingly demanded in recent years. Then, running and debugging the parallel programs on multi-core DSPs are becoming more and more complicated as well. So, the efficient debugging method for the parallel programs has become a key factor to determining the development period for a parallel software. Therefore, it is significant to study the debugging scheme based on JTAG protocol for multi-core DSPs. In this paper, aiming at the debugging problem for multi-core DSPs, a parallel JTAG-based debugging and selection scheme has been proposed, which is also compatible with the Universal Serial Bus (USB) interface. The experimental results show that this scheme has advantages in the multi-core debugging framework optimization and communication mechanism optimization, greatly reducing the parallel program development period and improving the resource utilization.