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A Survey on Multiply Accumulate Unit

机译:乘法累积单位调查

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摘要

In the most of the Digital Signal Processing (DSP) applications, the fundamental operations usually involve multiplications and accumulations. Multiplication is the arithmetic operation in which a processor requires most of its time as well as hardware resources among all other arithmetic operations like addition and subtraction. To attain a high-performance DSP application for real time signal processing applications, efficient Multiply Accumulate Unit (MAC) is always a mainstay. In the last few years, the main focus of MAC design is to boost its speed. This is because speed and throughput rate are always the crucial parameters of DSP systems. In this paper, a survey is done for different kind of MAC unit with different multipliers and adders where, multipliers are used to create partial products while adders to accumulate these partial products. This study reviews various MAC units designed until now with high speed and low power consumption.
机译:在最大的数字信号处理(DSP)应用中,基本操作通常涉及乘法和累积。乘法是处理器在所有其他算术运算中需要大部分时间以及硬件资源的算术运算,如添加和减法。为了获得实时信号处理应用的高性能DSP应用,有效的乘法单元(MAC)始终是一个主节。在过去的几年里,Mac设计的主要焦点是提高其速度。这是因为速度和吞吐率始终是DSP系统的关键参数。在本文中,针对不同乘法器和加法器的不同类型的MAC单元进行了调查,其中,乘法器用于在加法器累积这些部分产品时创建部分产品。本研究审查了迄今为止的各种MAC单位,高速和低功耗。

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