FAULT INJECTION VIA ON-CHIP DEBUGGING IN THE INTERNAL MEMORY OF SYSTEMS-ON-CHIP PROCESSOR

摘要

The paper presents an on-chip debugging method for the injection of single faults in the processor cores of systems-on-chip. The method consists in the placement of faults injection infrastructure in a system-on-chip as an intellectual property core. This simplifies the fault injection environment, reduces delays injection and improves the performance, as well as allows doing long autonomous campaign for injection of faults without the use of external devices.