This paper proposes the development of a new digital pulse width modulation (PWM) scheme for aplication to both single phase and multiphase voltage regulation modules (VRMs), which are used as processor power supplies. A comparative analysis of this novel phase accumulator based PWM generation technique is presented with the traditionally used counter based PWM approach for synchronous buck converter topologies. A simulation study of open loop systems of these digital techniques is carried out to demonstrate their feasibility and performance characteristics. For practical evaluation of these two techniques, experiments in single-phase and eight-phase 12 V to 1 V buck converter controlled by an FPGA are performed by using the 16 bit phase accumulator and counter. The impact from the interleaving strategy is presented and peak-to-peak voltage ripple and output spectra are evaluated.
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