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Time-Memory Trade-Offs for Side-Channel Resistant Implementations of Block Ciphers

机译:用于块密码的侧通道抗性实现的时间记忆折衷

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Currently, the most efficient first-order masked implementations use the classical randomized table countermeasure, which induces a penalty factor of around 2-3 in execution time compared to an unmasked implementation. However, an S-box with n-bit input and m-bit out-put requires 2~nm bit memory; for example, AES requires 256 bytes of RAM. Conversely, generic S-box computation method due to Rivain-Prouff requires almost no memory, but the penalty factor to achieve first-order resistance is roughly 30-35. Therefore, we suggest studying time-memory trade-offs for block-cipher implementations based on an adaptation of a table compression technique proposed by IBM. We use the similar approach to study time-memory trade-offs for second-order masked implementations as well. We show that for the case of AES, reasonably efficient implementations can be obtained with just 40 bytes of RAM in both the cases and hence they can be used in highly memory constrained devices.
机译:目前,与未掩蔽的实现相比,最有效的一阶屏蔽实现使用经典随机表对策,其在执行时间中引起罚款率约为2-3。但是,具有N位输入的S盒和M位输出需要2〜NM位存储器;例如,AES需要256个字节的RAM。相反,由于rivain-prouff导致的通用S-box计算方法几乎没有内存,但达到一阶电阻的惩罚因素大约是30-35。因此,我们建议基于IBM提出的表压缩技术的调整来研究用于块密码实现的时隙折衷。我们使用类似的方法来研究第二阶屏蔽实现的时间内存权衡。我们表明,对于AES的情况,在案例中,可以在仅在40字节的RAM中获得合理的有效实现,因此它们可以在高度存储器受限的设备中使用。

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