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A multi-chip synchronization system based on diversity technique

机译:一种基于多样性技术的多芯片同步系统

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A multi-chip synchronization system based on diversity technique is presented. As diversity technique in communication, at the master IC chip's transmitter, two periodic synchronization signals (with a set delay time between them) have been sent as synchronization reference. At every IC chips' receiver end, a searching method (by internal state machine) is used to obtain the proper receiving clock for the two synchronization signals' reliable receiving, and the two received synchronization signals and an internal generated synchronization signal will be time aligned, only one of them is sent to reset the internal frequency divider. The two received synchronization signals are also monitored, and if any receiving error occurred, then the system will switch to use the other one or the internal one automatically. This multi-chip synchronization system can achieve a reliable multi-chip synchronization performance.
机译:提出了一种基于分集技术的多芯片同步系统。 作为通信中的分集技术,在主IC芯片的发射机处,已将两个周期性同步信号(在它们之间的设定延迟时间)作为同步参考。 在每个IC芯片接收器结束时,用于获得两个同步信号的可靠接收的正确接收时钟的搜索方法(通过内部状态机),并且两个接收的同步信号和内部生成的同步信号将是时间对齐的 ,只发送其中一个以重置内部分频器。 还监视两个接收的同步信号,如果发生任何接收错误,则系统将切换为自动使用另一个或内部。 该多芯片同步系统可以实现可靠的多芯片同步性能。

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