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Low-Power, Low-Latency Hermite Polynomial Characterization of Heartbeats Using a Field-Programmable Gate Array

机译:使用现场可编程门阵列的低功耗,低延迟Hermite多项式的心跳特性

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The characterization of the heartbeat is one of the first and most important steps in the processing of the electrocardiogram (ECG) given that the results of the subsequent analysis depend on the outcome of this step. This characterization is computationally intensive, and both off-line and on-line (real-time) solutions to this problem are of great interest. Typically, one uses either multi-core processors or graphics processing units which can use a large number of parallel threads to reduce the computational time needed for the task. In this paper, we consider an alternative approach, based on the use of a dedicated hardware implementation (using a field-programmable gate-array (FPGA)) to solve a critical component of this problem, namely, the best-fit Hermite approximation of a heartbeat. The resulting hardware implementation is characterized using an off-the-shelf FPGA card. The single beat best-fit computation latency when using six Hermite basis polynomials is under 0.5 ms with a power dissipation of 3.1 W, demonstrating the possibility of true real-time characterization of heartbeats for online patient monitoring.
机译:心跳的表征是鉴于随后分析的结果取决于该步骤的结果,所以对心电图(ECG)的处理中的第一和最重要的步骤之一取决于该步骤的结果。此表征在计算密集,并且对此问题的离线和在线(实时)解决方案非常兴趣。通常,人们使用多核处理器或图形处理单元,该单元可以使用大量并行线程来减少任务所需的计算时间。在本文中,我们考虑一种替代方法,基于使用专用硬件实现(使用现场可编程门阵列(FPGA))来解决这个问题的关键组分,即,最适合的Hermite近似心跳。由此产生的硬件实现的特征在于使用搁板的FPGA卡。使用六个Hermite基础多项式时的单次拍打最佳拟合计算延迟低于3.1W的功耗低于0.5毫秒,表明在线患者监测的心跳真正实时表征的可能性。

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