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Low-Power, Low-Latency Hermite Polynomial Characterization of Heartbeats Using a Field-Programmable Gate Array

机译:使用现场可编程门阵列的心跳信号的低功耗,低延迟Hermite多项式表征

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The characterization of the heartbeat is one of the first and most important steps in the processing of the electrocardiogram (ECG) given that the results of the subsequent analysis depend on the outcome of this step. This characterization is computationally intensive, and both off-line and on-line (real-time) solutions to this problem are of great interest. Typically, one uses either multi-core processors or graphics processing units which can use a large number of parallel threads to reduce the computational time needed for the task. In this paper, we consider an alternative approach, based on the use of a dedicated hardware implementation (using a field-programmable gate-array (FPGA)) to solve a critical component of this problem, namely, the best-fit Hermite approximation of a heartbeat. The resulting hardware implementar-tion is characterized using an off-the-shelf FPGA card. The single beat best-fit computation latency when using six Hermite basis polynomials is under 0.5 ms with a power dissipation of 3.1 W, demonstrating the possibility of true real-time characterization of heartbeats for online patient monitoring.
机译:考虑到后续分析的结果取决于该步骤的结果,因此心跳的表征是心电图(ECG)处理中的第一个也是最重要的步骤之一。这种表征是计算密集型的,并且对该问题的离线和在线(实时)解决方案都非常感兴趣。通常,使用多核处理器或图形处理单元可以使用大量并行线程来减少任务所需的计算时间。在本文中,我们考虑了一种替代方法,该方法基于使用专用硬件实现(使用现场可编程门阵列(FPGA))来解决此问题的关键组成部分,即最合适的Hermite近似。心跳。最终的硬件实现是使用现成的FPGA卡进行表征的。当使用六个Hermite基多项式时,单搏最佳拟合计算延迟小于0.5 ms,功耗为3.1 W,这证明了可以对心跳进行实时实时表征以进行在线患者监测。

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