【24h】

Design of High Performance Reliable Network on Chip Router

机译:芯片路由器高性能可靠网络设计

获取原文

摘要

Uninterrupted Advancing of CMOS process technology allows to integrate multiple miniature devices over a single chipset for efficient and quality communication and facilitate the development of multiprocessors system-on-chip connected by the network-on-chip (NOC). However, this integration brings about some trust issues and performance challenges for this device. In this paper, we put forward reliable on chip router with high performance and router with lower cost design which uses generic 2-stage router, by using VHDL coding. The router we put forward varies significantly from the already available reliable routers, and hence our device can sustain its performance under heavy network loads as we make use of optimization technique and routing algorithm. Our device also has an added benefit of lower hardware consumption than that of the one which is already in use. We plan to implement VCT technique for network on chip architecture. We also propose to design and implement VCT router by using Xilinx ISE 13.1.
机译:不间断地推进CMOS工艺技术允许将多个微型设备集成在单个芯片组上,以实现高效和质量的通信,并促进通过网络(NOC)连接的多处理器系统的开发。但是,这种集成带来了这款设备的一些信任问题和性能挑战。在本文中,我们通过使用VHDL编码,在具有高性能和路由器的高性能和路由器上提出了可靠的芯片路由器。我们提出的路由器从已经可用的可靠路由器中显着变化,因此我们的设备可以在我们利用优化技术和路由算法时在重型网络负载下维持其性能。我们的设备还具有比已经使用的硬件消耗更低的硬件消耗的额外效益。我们计划为芯片架构上的网络实施VCT技术。我们还建议使用Xilinx ISE 13.1设计和实现VCT路由器。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号