Design and Simulation of High Stability 2-Stage Differential Op-Amp Integrator in 180nm CMOS Technology

摘要

Integrator is an Op-Amp circuit application which does the mathematical operation of integration, i.e. the output voltage is proportional to the integral of input voltage. The stability of Op-Amp circuit is analyzed by Gain and Phase Margin curves. This paper also discusses the power consumption of Op-Amp as well as Integrator analog circuit. The circuits are simulated and analyzed at 1180nm standard CMOS process. The Gain-Bandwidth product of Operational Amplifier is analyzed at different bias voltages. The power of Integrator is 7.844mW which is evaluated by using the Op-Amp as the lower block of the Integrator. The Unity Gain Bandwidth of Operational Amplifier is 15 MHz at 0.7V biasing voltage and 21 MHz at 0.4V biasing voltage with power consumption of 7.158mW and 6.998mW, respectively.