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Design of variable length ring oscillator for clock synthesis

机译:时钟合成可变长度环形振荡器的设计

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In this paper, we propose a new architecture of voltage tuning variable length ring oscillator, which can be used in applications such as frequency synthesis, data clock recovery and in phase locked loops (PLLs) based systems. The frequency of the proposed ring oscillator (RO) can be changed dynamically from one frequency to another frequency within a clock period by changing the length of the oscillator electronically. An analog frequency tuning mechanism is also introduced here to make it suitable for applications in PLL based systems. The experimental results from a prototype hardware electronic circuit are presented here to support the validity of the proposed architecture of the RO.
机译:在本文中,我们提出了一种新的电压调谐变长环振荡器体系结构,可用于诸如频率合成,数据时钟恢复和基于阶段锁定的环(PLLS)的系统的应用中。 通过以电子方式改变振荡器的长度,可以在时钟周期内动态地从一个频率动态地改变所提出的环形振荡器(RO)的频率。 此处还介绍了模拟频率调谐机构,以使其适用于基于PLL的系统中的应用。 这里提出了来自原型硬件电子电路的实验结果,以支持RO的所提出的架构的有效性。

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