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Interfacial structures and electrical properties of HfO_2 gate dielectric

机译:HFO_2栅极电介质的界面结构和电性能

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HfO_2 high-k dielectric films of 4nm and 5nm were both grown on Si substrate with the method of PEALD at 160°C. Both were treated with rapid thermal annealing (RTA) process at 500°C. High resolution transmission electron microscopy (HRTEM) indicated both films were not crystallized. X-ray photoelectron spectra (XPS) indicated that Hf-silicate was formed in the interfacial layer, and the valence-band offset (VBO) between the dielectric film and the substrate interface was calculated to be 3.5 eV. The electrical measurements indicated that the leakage current densities of the four and five nanometers' sample were 1.0mA/cm~2 and 0.8mA/cm~2 at gate bias of IV, and the equivalent oxide thicknesses of them were 0.9nm and 1.2nm respectively. Densities of interfacial states of them were calculated to be 1.58×10~(12)eV~(-1)cm~(-2) and 4.80×10~(11)eV~(-1)cm~(-2).
机译:HFO_2高k介电薄膜4nm和5nm均在Si衬底上生长,具有160℃的PEALD方法。两者都在500℃下用快速热退火(RTA)处理处理。高分辨率透射电子显微镜(HRTEM)表示两薄膜没有结晶。 X射线光电子体光谱(XPS)表明在界面层中形成HF硅酸盐,并且介电膜和衬底接口之间的价带偏移(VBO)计算为3.5eV。电测量表明,在IV的栅极偏压下,四个和五纳米样品的漏电流密度为1.0mA / cm〜2和0.8mA / cm〜2,它们的等同氧化物厚度为0.9nm和1.2nm分别。计算它们的界面状态的密度为1.58×10〜(12)eV〜(-1)cm〜(-2)和4.80×10〜(11)EV〜(-1)cm〜(-2)。

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