A novel track and hold circuit with offset and gain calibration

摘要

A novel track and hold circuit in 0.18μm SiGe BiCMOS process is presented, whose offset and gain can be digitally calibrated, and which can be used in a time-interleaved ADC to improve its performances. The simulated results show that the proposed track and hold circuit can sample a signal at a rate of 1.25GHz, while consuming just 50mW. The offset calibration can get a range of 26.6mW with a step of 0.1mW, while the gain calibration gets a range of 33.28dB with a step of 0.13dB.