【24h】

Statechart-based Design Controllers for FPGA Partial Reconfiguration

机译:基于StateChar的设计控制器,用于FPGA部分重新配置

获取原文
获取外文期刊封面目录资料

摘要

Statechart diagram and UML technique can be a vital part of early conceptual modeling. At the present time there is no much support in hardware design methodologies for reconfiguration features of reprogrammable devices. Authors try to bridge the gap between imprecise UML model and formal HDL description. The key concept in author's proposal is to describe the behavior of the digital controller by statechart diagrams and to map some parts of the behavior into reprogrammable logic by means of group of states which forms sequential automaton. The whole process is illustrated by the example with experimental results.
机译:StateChart图和UML技术可以是早期概念建模的重要组成部分。目前,用于重新编程设备的重新配置功能的硬件设计方法中没有多少支持。作者试图弥合不精确的UML模型与正式HDL描述之间的差距。作者提议中的关键概念是通过StateChart图描述数字控制器的行为,并通过组形成顺序自动机组的态,将行为的某些部分映射到可重编程逻辑中。通过实验结果示例说明整个过程。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号