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Non-volatile memory controller design using fault-tolerant techniques for memory reliability improvement

机译:非易失性存储器控制器设计利用容错技术进行记忆可靠性改进

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Currently we can observe rapid progress in non-volatile memory technologies. As the market of mobile devices grows, there is a constant demand for new non-volatile memories, which should not only be inexpensive, but also small and fast. Developments in the tablet and smartphone fields are the major factor of increasing market requirements [1]. Moreover, we have to consider areas such as automotive, health care, or space, where the greatest emphasis is placed on reliability. To fulfill market requests, many companies are constantly working on new solutions and design methods. Nowadays we can distinguish several non-volatile memory types that are being developed. They range from phase-change through magnetoresistive and ferroelectric, to flash, to name a few [2-3]. Unfortunately, all of them possess some disadvantages. There is no universal memory available, which would be an optimal choice for all applications. Depending on the used technology, the mentioned memories suffer from problems such as asymmetric and high access time, limited number of write/erase cycles, bit-flipping, cell wear-out, complex production process, or problems with a decreasing feature size of the used technology. Therefore, the memory selection should be carried out carefully, based on required reliability and fault-tolerance level, when designing an embedded system for a specific application. Although memory's reliability can be improved on technology or layout levels, this paper is focused on technology independent logic design solutions. The paper presents a flash memory controller based on modified versions of common fault-tolerant techniques. It will be further explained that presented design approach provides solution for handling static and dynamic errors which can occur in the memory. The controller was designed for embedded NOR type flash memory. It can also be used for other types of non-volatile memories, after having made some modifications in the design.
机译:目前我们可以观察非易失性记忆技术的快速进步。随着移动设备市场的增长,对新的非易失性存储器的需求不断,这不仅应该是廉价的,而且很快。平板电脑和智能手机领域的发展是增加市场要求的主要因素[1]。此外,我们必须考虑诸如汽车,医疗保健或空间等领域,最重要的重点是可靠性。为了满足市场要求,许多公司不断努力新的解决方案和设计方法。如今我们可以区分正在开发的几种非易失性的内存类型。它们的范围从磁阻和铁电,闪烁的相变,以命名几[2-3]。不幸的是,所有这些都拥有一些缺点。没有可用的通用内存,这将是所有应用的最佳选择。根据二手技术,所提到的存储器遭受不对称和高访问时间,有限的写入/擦除周期,比特翻转,细胞磨损,复杂的生产过程,或者具有减少特征尺寸的问题二手技术。因此,在为特定应用程序设计嵌入式系统时,应根据所需的可靠性和容错级别仔细执行存储器选择。虽然内存的可靠性可以改善技术或布局水平,但本文集中于技术独立逻辑设计解决方案。本文介绍了一种基于常见容错技术的修改版本的闪存控制器。还将进一步解释,所提出的设计方法提供了处理可以在存储器中发生的静态和动态误差的解决方案。控制器是为嵌入式闪存而设计的。在设计中进行了一些修改之后,它也可用于其他类型的非易失性存储器。

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