A Fast Hardware Implementation of Multiplicative Inversion in GF(2~m)

摘要

In this paper, a fast hardware implementation of multiplicative inversion in GF(2~m) using the optimal normal basis of type II is presented. The approach followed is based on the Sunar-Koc multiplier and the Itoh-Tsujii algorithm. Our design is able to compute multiplicative inversion in GF(2~233) using only 26 clock cycles.