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Compact modeling of interconnect reliability

机译:紧凑的互连可靠性建模

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摘要

Electromigration (EM) is one of the major reliability issues for modern integrated circuits. EM normally triggers a chip failure due to formation and growth of voids in a metal line of the interconnect structure. In order to investigate the failure mechanisms, EM experiments are performed under accelerated conditions, where an interconnect line is stressed with a higher current density and at a higher temperature than those under typical use conditions. Then, for the estimation of the interconnect lifetime under a real operating condition the times to failure (TTF) obtained from the accelerated tests have to be extrapolated to the use current density and temperature. A correct description and an adequate extrapolation procedure are, therefore, a must for a correct reliability assessment regarding EM failures.
机译:电迁移(EM)是现代集成电路的主要可靠性问题之一。由于在互连结构的金属线中的形成和生长,EM通常触发芯片故障。为了研究失效机制,EM实验在加速条件下进行,其中互连线以较高的电流密度和比典型使用条件下的温度更高的温度应力。然后,为了在实际操作条件下估计互连寿命,从加速测试获得的次数(TTF)必须推断为使用电流密度和温度。因此,正确的描述和适当的外推过程是关于EM失败的正确可靠性评估的必备。

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