Imaging Performance of Production-Worthy Multiple-E-Beam Maskiess Lithography

摘要

E-beam maskless lithography is a potential solution for 32-nm half-pitch (HP) node and beyond. The major concern to implement it for mass production is whether its throughput can reach a production-worthy level. Without violating the law of physics using unrealistic e-beam current, parallelisms in the writing beams and the data path are a few possible solutions to achieve such high productivity. It has been proposed to realize throughput greater than 10 wafers per hour ( WPH) from a single column with >10,000 e-beams writing in parallel, or even greater than 100 WPH by further clustering multiple columns within an acceptable tool footprint. The MAPPER concept contains a CMOS-MEMS blanker array supported by high-speed optical data-path architecture to simultaneously control this high number of beams, switching them on and off independently.