首页> 外文会议>IEEE International Conference on Computer Science and Information Technology >Instruction-set simulator design and realization based on the virtual instruction
【24h】

Instruction-set simulator design and realization based on the virtual instruction

机译:基于虚拟指令的指令集模拟器设计与实现

获取原文

摘要

Instruction-set simulator is very important method and technique in reverse engineering analysis, compiling optimization and code coverage testing. It provides the test platform for analyzing software and the accurate data for program comprehension. An instruction-set simulator is designed in this article, it can simulate various processor's object program. This paper also provides a method to construct virtual instruction set, especially describes design memory simulating and instruction system simulating in the instruction-set simulator.
机译:指令集模拟器是反向工程分析,编译优化和代码覆盖测试中的非常重要的方法和技术。它提供了用于分析软件的测试平台和程序理解的准确数据。在本文中设计了一个指令集模拟器,它可以模拟各种处理器的对象程序。本文还提供了一种构造虚拟指令集的方法,特别是描述了在指令集模拟器中模拟的设计内存仿真和指令系统。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号