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Crystallographic Silicon-Etching for Ultra-High Aspect-Ratio FinFET

机译:用于超高纵横比FinFET的晶体硅蚀刻

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摘要

The fabrication process for the FinFET with ultra-high fin-height to fin-width aspect-ratio is presented. The processing is based on the crystallographic etching of (110) bulk silicon-wafers by TMAH to expose the vertical (111) planes. The nitride-spacers are used as the hard-mask for the fin-etching and the fins are isolated by the planarization and etch-back of the thick isolation oxide. The demonstration devices exhibit nearly ideal S of 62-64 mV/dec and DIBL of 10 mV/V or lower, for the gate-length of 410 nm and the height of the active part of the fin of 400 nm. The output current is limited by the large series resistances for both pFETs and nFETs, and additionally by the gate-depletion in nFETs, but large currents per fin, above 30 μA for pFET are achieved due to tall fin-structure.
机译:提出了具有超高翅片高度的FinFET与翅片宽度纵横比的制造过程。该处理基于TMAH的(110)块硅晶片的晶体蚀刻以暴露垂直(111)平面。氮化物间隔物用作翅片蚀刻的硬掩模,并且通过平坦化和蚀刻氧化物的蚀刻物分离翅片。演示装置表现出62-64mV / DEC和DIBL的几乎理想的S10mb / V或更低,用于410nm的栅极长度和400nm的翅片的活性部分的高度。输出电流受到PFET和NFET的大串联电阻的限制,并且另外通过NFET中的栅极耗尽,但由于高于翅片结构,每翅片的大量电流耗尽,因此由于高翅片结构而实现了30μA的PFET。

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