首页> 外文会议>International Conference of Nitride Semiconductors >In-situ passivation combined with GaN buffer optimization for extremely low current dispersion and low gate leakage in Si_3N_4/AIGaN/GaN HEMT devices on Si (111)
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In-situ passivation combined with GaN buffer optimization for extremely low current dispersion and low gate leakage in Si_3N_4/AIGaN/GaN HEMT devices on Si (111)

机译:原位钝化结合GaN缓冲优化,在SI(111)上的SI_3N_4 / AIGAN / GAN HEMT器件中的极低电流分散和低栅极泄漏

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Using Si substrates is the sole route towards III-nitrides process on large wafer diameter: flat, crack-free HEMT epiwafers have been grown by MOVPE with diameter up to 150 mm, exhibiting very low sheet resistivity (260 Ω/sq.) and high uniformity (<2%), thanks to in-situ Si3N4 capping (<5 nm). We show here that simultaneous optimization of GaN growth and of device passivation results in a drastic reduction of buffer and surface traps. This has impact onto device performance, assessed by pulse IV measurements. Drain lag is correlated with the appearance of deep defect-related peaks in photolu-minescence spectra (6 K), and completely eliminated by tun-ing growth temperature. Gate formation (Ni/Au) onto MOVPE-grown Si_3N_4, followed by cleaning and PECVD ex-situ passivation, leads to very low gate current dispersion, associated to gate leakage current in μA/mm range. Both dc and pulsed characteristics show a current density in the order of 0.8-1 A/mm, whereas maximal transconductance is 250 mS/mm (L_g= 1 μm).
机译:使用Si衬底是对大晶片直径的III-氮化物过程的唯一途径:平坦的,无裂缝的HEMT Epiwafers已被直径高达150 mm的MOVPE生长,表现出非常低的薄层电阻率(260Ω/ sq。)和高均匀性(<2%),由于原位Si3N4封盖(<5 nm)。我们在这里展示了GaN生长和设备钝化的同时优化导致缓冲和表面陷阱的急剧减少。这对设备性能产生了影响,通过脉冲IV测量评估。漏极滞后与光学缩磷光谱(6 k)中的深缺陷相关峰的外观相关,并通过调节生长温度完全消除。栅极形成(Ni / Au)在Movpe生长的Si_3N_4上,然后清洁和PECVD ex-situ钝化,导致非常低的栅极电流分散,与μA/ mm范围内的栅极漏电流相关联。 DC和脉冲特性均显示为0.8-1A / mm的电流密度,而最大跨导是250ms / mm(L_G =1μm)。

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