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Direct Digital-Frequency Synthesizer for Dielectrophoresis

机译:直接数码频率合成器,介电流量

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It is common practice to use sinusoidal signals for generating the electric fields needed for particle manipulation using dielectrophoresis (DEP). A Direct Digital Frequency Synthesizer (DFFS) is well suited for this application because of its fast switching speed, high resolution, small size and low power. The focus of this paper is on design, analysis, simulation and implementation of a DDFS, using Altera tools. The proposed architecture uses a unipolar digital-to-analog converter (DAC). Memory size is reduced more than 75 percent using quadrant compression. To decrease the amount of hardware even further, the phase generated by the phase accumulator is truncated before it is used by the ROM. Dither is added in order to get higher spurious free dynamic range. Further reduction is achieved storing in the ROM only the difference between the sinusoidal function and the phase.
机译:常见的做法是使用正弦信号使用介电泳(DEP)产生粒子操纵所需的电场。由于其快速开关速度,高分辨率,小尺寸和低功耗,直接数字频率合成器(DFF)非常适合该应用。本文的重点是使用Altera工具的设计,分析,仿真和实现DDFS。拟议的架构使用单极数码转换器(DAC)。使用象限压缩,内存尺寸减少超过75%。为了进一步减小硬件量,在ROM使用之前被阶段累加器产生的阶段被截断。添加抖动以获得更高的无杂散动态范围。进一步减少在ROM中存储仅在正弦功能和相位之间的差异。

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