A DVB-T/H Baseband Receiver for Mobile Environments

摘要

This paper presents an architecture design, FPGA implementation, and measurement results of a real-time baseband processor for DVB-T/H receiving. The proposed receiver supports 2K/4K/8K mode and all the GI ratios defined in standard with mode/ratio detection. To improve the performance in high mobile environment, the proposed channel estimation with linear prediction in pilot subcarriers and quadratic interpolation of non-pilot subcarriers provides a better estimation (at Doppler frequency 300 Hz). The FPGA implemented results give a low complexity of 139k gate counts working on 36.75 MHz clock rate.