We propose a methodology for accurately estimating the Simultaneous Switching Noise (SSN) directly from the Power Distribution Network (PDN) frequency-domain impedance for un-terminated single-ended memory systems such as MDDR/LPDDR1 and LPDDR2, without doing the time-domain simulation. The time-domain SSN simulation with the circuit, package and board requires huge computer resource and long simulation time. On the other hand, the frequency-domain PDN impedance is much easier to obtain. The methodology is validated by time-domain circuit simulations with transistor models. We also present a new design parameter for the PDNs of LPDDR2 memory systems, which is more accurate than the target impedance.
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