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LOWERING LAYERS w/HDI for RoHS ROBUSTNESS

机译:降低层W / HDI用于ROHS鲁棒性

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A perplexing challenge for RoHS compliance is adapting large, complex and thick, high-layer count multilayers to lead-free assembly. These are typically dense, complex assemblies with large BGAs and significant heat spreading features integrated into the design. Fine-pitch packages (QFPs and BGAs) and increasing pin count of packages further complicates the conversion to RoHS. To provide RoHS robustness to an assembled multilayer that has a very high heat-sinking characteristic requires that the total layers be reduced, as well as its overall thickness. But how can this be accomplished? The answer is to increase signal routings per layer by 2X to 4X, and thus reduce overall signal layers and their referenced plane layers. The other new design feature is to change 'topology' so that a majority of vias are now 'blind vias', thus freeing up innerlayer space for this to be accomplished. HDI is the interconnect technology that has been developed to respond to these needs. Microvias are the principal feature of HDI, along with thinner dielectrics and smaller traces and spaces. The important feature is the "Design For Lower Layers Using HDI". This paper covers the major design solutions from HDI that allows designers to implement fewer layers in a multilayer: 1. Reduction in layer count for thickness control and RoHS compliance (Lead-Free Assembly) 2. How to integrate high-I/O and fine-pitch devices without adding layers 3. How to achieve higher component density and component I/Os without adding layers The resulting new multilayers are not only thinner and easier to design but are less expensive and suitable for lead-free assembly. The resulting new multilayers are not only thinner, cheaper, and easier to design but are less costly and suitable for lead-free assembly.
机译:RoHS遵从性的令人困惑的挑战正在适应大型,复杂和厚的高层计数多层,以无铅装配。这些通常是密集的,复杂的组件,具有大的BGA和集成到设计中的显着散热功能。细间距包装(QFP和BGA)和增加封装的销钉数进一步使转换与RoHs相复杂。为了向组装的多层提供RoHS稳健性,具有非常高的散热特性,要求总层和其总厚度。但这可以实现如何完成?答案是将信号路由增加2x至4x,从而减少总信号层及其引用的平面层。另一个新的设计特征是改变“拓扑”,以便大多数vys现在是“盲目的通存”,从而释放实现的内蒙古空间。 HDI是已开发的互连技术,以应对这些需求。微径是HDI的主要特征,以及较薄的电介质和较小的痕迹和空间。重要特征是“使用HDI的下层设计”。本文涵盖了HDI的主要设计解决方案,允许设计人员在多层中实现更少的层数:1。厚度控制和RoHS合规性的层数减少(无铅组件)2.如何集成高I / O和罚款 - 在没有添加图层的情况3的情况3.如何实现更高的分量密度和组件I / O,而无需添加图层,所得到的新多层不仅较薄,更容易设计,但不太昂贵,适用于无铅组件。由此产生的新多层不仅更薄,更便宜,而且更容易设计,但不太昂贵,适用于无铅装配。

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