Contention Resolution by means of Packet Envelope Detection Circuit with a Slow Saturable Absorber-based Vertical Cavity Semiconductor Gate

摘要

In next generation optical networks all-optical technologies are required to perform switching functionalities in the optical domain, such as resolution of packets contention. In packet-switched networks, contention occurs when two or more optical packets arrive simultaneously at the same packet switch. A well-known solution for solving packet contentions is optical buffering. This requires a proper arbiter function and a gating signal controlling a routing switch. In [1] these operations were implemented by using an optical threshold function based on two coupled oscillators. This technique exploits two Semiconductor Optical Amplifiers (SOAs)-based ring lasers which have two possible dominant states at different wavelengths. The same operation can be realized by an optical flip-flop circuit. In this paper a new effective and cheap solution is proposed for contention resolution in time-slotted network. The scheme exploits a Packet Envelope Detection Circuit (PEDC) which provides, when the high-priority packet is present, a gating signal for a 1×2 All-Optical Switch (AOS). The AOS deflects the low priority packet to an appropriate optical buffering stage or to its original routing path depending whether the high-priority packet is present either not, respectively. The core element of the scheme is a passive, slow saturable absorber with a vertical-cavity comprising semiconductor Multiple Quantum Wells (MQWs). Successful operation is demonstrated with optical packets encompassing randomly modulated data at 12.5 Gb/s and 40 Gb/s.