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Modeling of Gigabit Backplanes from Measurements

机译:千兆底板从测量建模

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This paper presents the effective approach of building an accurate measurement-based model for a gigabit backplane operating at 3.2Gbit/s. The paper discusses the point of how a measurement-based model will help to overcome the many modeling challenges of these high-speed gigabit backplanes. HSPICe simulation of the model demonstrates excellent correlation with measured data. Both the measured and the modeled eye diagrams that were generated at speed as high as 3.2Gbit/s and 80ps 20-80% rise time, are shown. This technique will allow designers to quickly accomplish interconnect modeling and analysis tasks, resulting in increased design reliability with lower design costs.
机译:本文介绍了在3.2Gbit / s下运行的千兆底板建设准确测量基于型号的有效方法。本文讨论了如何衡量基于测量的模型将有助于克服这些高速千兆背板的许多建模挑战。模型的HSPICE仿真展示了与测量数据的良好相关性。示出了以高达3.2Gbit / s和80PS 20-80%的升高产生的测量和模拟的眼图,如3.2Gbit / s和80ps 20-80%的上升时间。该技术将允许设计人员快速完成互连建模和分析任务,从而提高了设计成本较低的设计可靠性。

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