Design of Tomlinson-Harashima Precoder for 112G-PAM4 XSR Applications

摘要

CEI-112G-XSR-PAM4 standard draft specifies a 112G-PAM4 D2OE (die-to-optics) and D2D (die-to-die) electrical interface for System-In-Package (SiP) applications. Although XSR channels are low loss, the problem is shifted to dealing with reflections as well as with limited power allowance. Proposed equalization in the current CEI standard draft, 3-tap TX FIR and RX CTLE, has significant challenges in achieving BER<1e-9 over PVT for channels whose lengths spans from several millimeters to 50mm. This paper introduces Tomlinson-Harashima Precoder (THP) for XSR applications. We show that with use of THP, the improved performance can be achieved over the equalization proposed in. In fact, BER<1e-12 can be potentially achieved with THP, which could be an overall power saving architecture approach. The THP working principle, with and without modulo operations, is presented. XSR channels' modeling for a 5mm- and 50mm-length package substrate traces are provided as examples. It is demonstrated that the RX CTLE can be potentially removed to save power and area if using THP-based architecture.