End-to-end FEC Performance Analysis for Multi-stage PAM4 Systems

摘要

FEC becomes mandatory for 56G-PAM4 link systems. In a multi-stage-link system where FEC is only used in end devices, mixed mode errors from each link stage collectively impact the end-to-end link performance. In this paper we introduce a simulation algorithmic model for evaluating end-to-end PAM4 RS-FEC performance for multi-stage link applications. FEC symbol error patterns within each stage are combined to form FEC symbol error patterns for analyzing the final stage FEC capability. The goal of the paper is to provide a method for end-to-end FEC performance evaluation and to help system designs with performance budgeting to achieve the best overall link margin.