Enabling World's first over 4.4Gbps/pin at sub-1V LPDDR4 Interface using Bandwidth Improvement Techniques

摘要

Constant demand for enhancing user experience in mobile computing device has been creating strong demand for high-speed mobile DRAMs. Pin bandwidth of high-end mobile devices reached 800Mbps (LPDDR2) in 2011, and 1600Mbps(LPDDR3) in 2013 and will be increased up to 3200Mbps (LPDDR4) in 2015. As the above data indicates, the mobile DRAM bandwidth has been doubled in every other year with the advance of its generations. The main competition source to increase the DRAM bandwidth is the fast enhancement of graphic performance: QHD(2560×1440) screen resolution, 4k(3840×2160) video encoding/decoding, multi-screen support and 3D graphics. However, the limit in battery life requires mobile DRAMs to achieve the target bandwidth with improved power efficiency whenever new generation standard is defined. LPDDR4 SDRAMs satisfy this hard requirement thanks to the 2 channel architecture, low voltage swing terminated logic (LVSTL) and other advanced IO techniques.