Correlation Methodology for Generating IBIS-AMI Receiver Models for Multi-Gigabit SerDes Devices

摘要

In this paper, we present a methodology for generating a correlated IBIS-AMI receiver model for a multi-gigabit SerDes device. The receiver model contains such features as: architecturally accurate clock data recovery, a linear equalizer with programmable bandwidth, a variable gain amplifier, a decision feedback equalizer, and statistically correlated noise sources. We will show simulation results with our IBIS-AMI transmitter and receiver models and their excellent correlation to measurement data.