FPGA-based Implementation of APB/SPI Bridge

摘要

The article discusses the design process of the bus bridge between internal APB bus of the central processing unit implemented by means of field-programmable gate array and the external peripherals. On the one hand, the designed bridge offers scalability and can be used anywhere. On the other hand, the authors attempt to reflect on the possible usage of the module in design of IEC 61131-3-based programmable logic controller. The design problems, assumptions and possibilities of the designed IP core are presented.