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Simulation Analysis of Embedded Thin-Film Decoupling Capacitor in Multilayer Packages and PCBs

机译:多层封装和PCB中嵌入式薄膜去耦电容的仿真分析

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This report describes the design guide of the high-performance multi-layer packages and printed circuit boards to reduce power/ground inductive impedance for the high frequency power integrity. The inductive impedance was compared between two types of methods in this study. One is the low inductive decoupling MLCC (Multi Layer Ceramic Capacitor) and the other is the embedded decoupling capacitor with high dielectric constant films. FDTD (finite difference time domain)-method, which is based on EMI (electromagnetic interference) technique, was used for the power integrity simulation. From the results of the simulation, it is observed that the electrical performances of the embedded capacitor boards are better than those of the conventional board with SMT ceramic capacitor only. It is established that the design guide of power integrity as functions of embedded materials and multi-layer package structures in the high frequency range up to 3GHz.
机译:本报告描述了高性能多层封装和印刷电路板的设计指南,以降低高频功率完整性的功率/地电感阻抗。在这项研究中的两种方法之间比较了感应阻抗。一个是低电感去耦MLCC(多层陶瓷电容器),另一个是具有高介电常数膜的嵌入式去耦电容器。 FDTD(有限差分时域) - 基于EMI(电磁干扰)技术的方法用于电力完整性模拟。从模拟结果中,观察到嵌入式电容器板的电气性能优于传统板的电气性能,仅具有SMT陶瓷电容器。建立了电力完整性设计指南作为嵌入式材料的功能和高频范围内的多层封装结构高达3GHz。

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