Implementation Methodologies of a Software Defined Navigator (SDN) allowing the Conception of a Real Time Robust Hybrid GPS/Galileo Receiver

摘要

This paper deals first with the implementation methodologies to design hardware navigation receivers using the new telecommunication SDR (Software Defined Radio) state-of-the-art concept. Those concepts and know-how with sufficient adaptations to the navigation domain allow reaching a generic version of the so-called Software Defined Navigator (SDN) well suited for fast real-time prototyping. In this study, a real-time architecture of a robust hybrid GPS/Galileo receiver will be presented. In fact, the GPS and GNSS market is growing rapidly, and new services will be brought up soon. The need of an easy adaptable and reconfigurable architecture of a navigation receiver was proven to be important in order to follow the satellite system continuous evolutions and technological modifications. The gain of using the Galileo constellation is obvious considering the four(4) main problematics of the GPS itself which are the precision, the robustness, the continuity of service and the system reliability as discussed in Kaplan[1]. The advent of the European Galileo navigation system will increase the demand on highly robust and precise GNSS hybrid receiver. This situation will make the issue of "time-to-market" an important one. To achieve this, a software defined navigator concept will be used to develop quickly new kind of navigation technologies and technical services, allowing to take advantages of the new potential of navigation market. Our interest will focus on the implementation capabilities of a Matlab-Simulink GPS receiver model in a targeted hardware composed of a FPGA and a DSP. Many parameters will be taken into account for that kind of implementation. The high frequency data rate and the number of logical gates are among the characteristics needed to be evaluated. Also, the compromise between FPGA and/or DSP real-time implementation for the various sections of the simulation model will be approached by a thorough examination of the model's characteristics. Upon this analysis, the navigation receiver model will be separated in two different modules, one for the FPGA and one for the DSP. Realtime code generation methodology will be presented. Final version of the software architecture will be properly presented. A noisy environment is considered to analyze the accuracy of the model and to evaluate correctly the performances of the navigation receiver. The hardware platform in which the receiver will be implemented is modular and allows flexibility and rapid prototyping. The evaluation of the prototype is done by the simulation of the constellation and receiver within the hardware prototype. Evaluation of the receiver prototype is done using different parameters such as PLL and DLL parameters and resolution accuracy. The results are compared to the present literature standards of a GPS receiver. Finally, to compare the performance of the implemented model with an existing receiver, a GPS antenna is connected into an already developed Direct RF Sampling board in order to obtain IF samples of the real GPS signal. The data will be treated in the FPGA and DSP and the calculated position of our prototype given according to conventional navigation algorithms will be analyse.