FPGA implementation of a subspace tracker based on a recursive unitary ESPRIT algorithm

摘要

This paper presents an FPGA implementation of a subspace tracker. The proposed design exploits a low-complexity property of a fast recursive ESPRIT algorithm. In addition, by applying a unitary transform, the system can be formulated in terms of real-valued computations. The simulation and real-time implementation are given based on 2-million gate Virtex II FPGA from Xilinx.