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INTEGRATION OF LOW-POWER DIGITAL CIRCUITRY INTO UNDERGRADUATE CURRICULA

机译:低功耗数字电路将低功耗数字电路集成到本科课程中

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Power-aware computing has become in recent years a significant area of research and development in both academia and industry. Various techniques for reducing the temporal power and the long term energy consumption of embedded processors in general and mobile devices (e.g., cellular phones, PDAs and laptop computers) in particular, have been developed. Several new products whose main feature is lower power consumption have been introduced successfully into the marketplace. The techniques developed for achieving the reduced power and energy cover many phases of the computer system design including circuits, voltage scaling, micro-architectures and system software (i.e., operating systems and compilers). Over the last ten years or so, power-aware computing has been transformed from a somewhat arcane and limited discipline to one of the most active areas in computer science and engineering. This trend has been fueled by the following: Processors are becoming ever more power-hungry, and their power densities (watts/cm{sup}2) are increasing rapidly. The power density of many modern processors exceeds that of a hotplate and that of the core of a nuclear reactor. The problem of dissipating heat from a microprocessor is therefore becoming more acute. As feature sizes shrink, the fraction of energy lost to leakage will become significant. Leakage rises very rapidly with temperature: so running a processor hot will further increase power consumption, thereby setting up a positive feedback loop. Further, the processor failure rate increases with an increase in the operating temperature. Battery-powered applications have proliferated. Battery technology has not advanced as rapidly as processor power consumption, and this limits the mean time between recharges. The more obvious approaches to constraining power consumption, such as disk spindown and turning off the screen have already been implemented. More complex approaches are now being pursued for additional savings. The aggregate power consumption of computers is no longer a negligible fraction of the total power consumption in the United States. Approaches to reduce such power consumption can therefore be expected to make a measurable impact on the overall power consumed in the country.
机译:近年来,动力感知计算已成为学术界和工业的重要领域的研发领域。已经开发了一种用于减少嵌入式处理器的时间功率和长期能量消耗的各种技术,特别是特别是嵌入式处理器(例如,蜂窝电话,PDAS和笔记本电脑)。主要特征是较低功耗的几种新产品已成功引入市场。用于实现降低功率和能量的技术涵盖计算机系统设计的许多阶段,包括电路,电压缩放,微型体系结构和系统软件(即操作系统和编译器)。在过去的十年左右,动力感知的计算已经从一个奥术和有限的学科转变为计算机科学和工程中最活跃的区域之一。这种趋势通过以下方式推动:处理器变得越来越富有幂,并且它们的电力密度(瓦特/ cm {sup} 2)正在迅速增加。许多现代处理器的功率密度超过热板的电源密度和核反应堆的核心的电力密度。因此,来自微处理器的热量的问题变得越来越尖锐。随着特征尺寸缩小,损失泄漏的能量分数将变得显着。泄漏随温度迅速上升:因此运行处理器热将进一步提高功耗,从而建立正反馈回路。此外,处理器故障率随着工作温度的增加而增加。电池供电的应用增殖。电池技术并未作为处理器功耗迅速推进,这限制了充电之间的平均时间。已经实现了限制功耗的越明显的方法,例如磁盘上闪烁和关闭屏幕。现在正在追求更复杂的方法以获得额外的储蓄。计算机的总功耗不再是美国总功耗的可忽略的一部分。因此,可以预期降低这种功耗的方法对国家消耗的整体权力产生了可衡量的影响。

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