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A standard cell library for student projects

机译:学生项目的标准单元库

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A standard-cell library for MOSIS scaleable CMOS rules has been developed. it is intended for use with Synopsys Design Compiler, Cadence Silicon Ensemble, and Cadence Virtuoso or Magic. The library is targeted for the AMI 0.5μm process, which currently offers the smallest feature size in the MOSIS educational program. The library also includes I/O pad cells and fully places and routes a padframe if desired. All steps in the design flow are fully automated with only three scripts and have been tested successfully in a large VLSI design class at the Illinois institute of Technology. To customize and run these three scripts, for a given design, typically takes less than five minutes, since all details are transparent to the students, allowing them to focus on the design instead of worrying about the tools.
机译:已经开发了一种用于MOSIS可扩展的CMOS规则的标准单元库。它适用于Synopsys Design Compiler,Cadence Silicon Ensemble和Cadence Virtuoso或Magic。图书馆针对AMI0.5μm的过程,目前提供了Mosis教育计划中最小的特征尺寸。该库还包括I / O焊盘单元格和完全放置,并且如果需要,则会路由码头帧。设计流程中的所有步骤都只有三个脚本自动化,并且在伊利诺伊州理工学院的大型VLSI设计类中已成功进行测试。为定制和运行这三个脚本,对于给定的设计,通常需要不到五分钟,因为所有细节都对学生透明,允许他们专注于设计,而不是担心工具。

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